1. Field of the Invention
The invention has application in the field of telecommunications, in particular, digital telecommnunications systems. More specifically, the present invention relates to a frequency multiplier integrated circuit (IC) for generating a binary output signal with a frequency that is a multiple of the frequency of an input signal.
2. Related Art
In many systems, it is necessary to have clock signals of various frequencies to time the functions of various integrated circuits. Obtaining clocks derived from other circuits is simple, provided they can be obtained by dividing a reference clock's frequency by an integer number. However, sometimes it is necessary to obtain a clock signal with a frequency that is a multiple of that of a starting signal, a problem that is significantly more complicated.
Known high-precision commercial products are larger and more expensive than the frequency multiplier integrated circuit according to the present invention, which is configured as a smaller, more economical solution for those applications in which great precision is unnecesary. The inventive architecture includes, among other blocks, a frequency multiplier that generates a clock signal with a frequency that is a multiple of that of a reference signal.